The present invention relates in general to data processing systems, and in particular, to methods for tracing a sequence of instructions as a processing unit executes the instructions. Tracing is done as a way of keeping a sequence of instructions preceding an event in processing, determining what kind and how many particular instructions were used in a task, or optimizing the instructions needed for a particular computing process.
Tracing or recording of sequences of events that occurred prior to a desired or anticipated event has been used for many years. Transient recorders and storage oscilloscopes have been used to record hardware timings or electrical events as a way of analyzing what occurred prior to a desired or anticipated event or condition. Instructions within data processing systems are read and acted upon based on the architecture and interpretive structure of the system. Because the instructions and the hardware that interprets the instructions are complex it is difficult to predict all of the actions that may occur when the large combinations of instructions in a data processing system are executed. Tracing systems have been used for data processing systems as a means of storing and analyzing sequences of instructions that occurred before a particular event. Since instruction sequences in data processing systems may be modified by the particular sequence itself, all outcomes are not known and tracing is necessary to analyze faulty, unpredictable, or unknown results.
To implement tracing, many systems require routines that will route each executed instruction to an external device that records either all of the executed instructions in a block or a certain subset of the instructions executed. Usually the tracing system has a corresponding flagging or notification system that informs the user when a particular event has occurred so execution can be halted and the trace information analyzed. Various methods may be used to then analyze the stored and executed instructions.
Instruction execution speed in modern computers is increasing every year and it has become difficult to construct and communicate with external tracing units that store instructions without affecting the operation of the computer itself. This may require slowing of tracing operations and an increase in the time necessary to de-bug or analyze a system""s performance. Units designed specifically for tracing may not be flexible enough to allow a user to do analysis that was not anticipated when the tracing unit was constructed. The increasing speed and complexity of computer systems has lead to a need for better and more efficient methods for doing tracing.
The present invention provides a method and the system for implementing an instructional tracing unit for a computer or data processing system. The present invention discloses a method of constructing a tracing system that is compatible with many modern computer systems and does not severely limit system operation. The present invention is particularly suited for tightly coupled multiprocessor (MP) systems with shared memory. A block of shared memory is allocated to store executed instructions under the control of a trace hardware facility. The trace hardware facility is hardware built into each processor that may execute a trace routine. The trace hardware facility may be altered with configuration registers and is enabled in the processor that is designated the trace processor. The block of shared memory containing the stored, executed instructions can be accessed by one of the multiprocessors for analysis, archiving, or printing whenever a particular event resulting from the executed instructions occurs. Since the protocol and accessing of the shared memory is already a part of the system architecture, tracing can occur at system speed. Tracing could be designed to operate while the system was doing normal operations or only when the system is in a trace mode.
Because the processors in the MP system are general purpose with only modifications to facilitate tracing, the trace routine could be altered for a variety of tracing operations. The tracing processor could be programmed to read tracing data and to analyze the information simultaneous with execution of instructions. Operation would need to only be interrupted if the trace buffer was full or other contentions were detected.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention.